This invention relates to differential detection demodulators used in the radio communication systems, and more particularly to the improvements in the frequency converter and the phase comparator or the phase detection circuit used in the differential detection demodulators.
A conventional differential detection demodulator provided with a frequency converter and a phase comparator is disclosed, for example, in Japanese Laid-Open Patent (Kokai) No. 64-12646, "DPSK demodulation system". Next, this differential detection demodulator is described by reference to FIG. 8.
In FIG. 8, the frequency converter 20 includes a multiplier 21 and a low pass filter 22. The phase comparator 30 includes: a phase shifter 31 for shifting the phase of the local carrier (the phase reference signal) by .pi./2 radians; a multiplier 32 for multiplying the local carrier by the output of the low pass filter 22; a multiplier 33 for multiplying the output of the phase shifter 31 by that of the low pass filter 22; a low pass filter 34 for eliminating the high frequency components from the output of the multiplier 32; a low pass filter 35 for eliminating the high frequency components from the output of the multiplier 33; a sampler 36 for sampling the output of the low pass filter 34; a sampler 37 for sampling the output of the low pass filter 35; and a coordinate converter 38 for calculating and generating a relative phase signal from the outputs of the samplers 36 and 37. A delay element 40 delays the relative phase signal by one symbol period of the received signal. A subtractor 41 subtracts, in modulo 2.pi., the relative phase signal delayed by one symbol period by the delay element 40 from the relative phase signal directly output from the coordinate converter 38. A decision circuit 42 outputs the demodulated data according to the values of phase transition over each symbol period of the received signal.
Next the operation of the circuit of FIG. 8 is described in detail. It is a common practice in the field of demodulators to convert the frequencies of the received signal to low frequencies using a frequency converter. This facilitates subsequent signal processing. The received signal is a differential phase shift keying (DPSK) signal. This received signal is input to the frequency converter 20, where the multiplier 21 multiplies it by the signal for frequency conversion. It is assumed that the frequency of the received signal is f.sub.1 Hz and that of the frequency conversion signal f.sub.2 Hz. Then the multiplied signal output from the multiplier 21 includes a high frequency component at f.sub.1 +f.sub.2 Hz and a low frequency component at .vertline.f.sub.1 -f.sub.2 .vertline. Hz. This multiplied signal output from the multiplier 21 is supplied to the low pass filter 22, where the high frequency component is suppressed and only the low frequency component at .vertline.f.sub.1 -f.sub.2 .vertline. Hz is passed. The received signal thus undergoes the frequency conversion.
After being subjected to the frequency conversion by the frequency converter 20, the received signal is processed by the phase comparator 30. The multiplier 32 multiplies the received signal after the frequency conversion (output from the frequency converter 20) by the phase reference signal (the local carrier). The low pass filter 34 eliminates the high frequency components from the output of the multiplier 32, thereby obtaining the baseband signal in phase with the local carrier (referred to as the in-phase baseband signal).
The phase shifter 31 shifts the phase of the phase reference signal or the local carrier by .pi./2 radians. The multiplier 33 multiplies the received signal after the frequency conversion (output from the frequency converter 20) by the output of the phase shifter 31. The low pass filter 35 eliminates the high frequency components from the output of the multiplier 33, thereby obtaining the baseband signal in quadrature with the local carrier (referred to as the quadrature baseband signal).
The in-phase baseband signal output from the low pass filter 34 is sampled by the sampler 36 and supplied to the coordinate converter 38. Similarly, the quadrature baseband signal output from the low pass filter 35 is sampled by the sampler 37 and supplied to the coordinate converter 38. The coordinate converter 38 outputs the relative phase signal representing the phase shift of the received signal after frequency conversion relative to the local carrier, i.e. the phase reference signal. The value of the relative phase signal .theta. is expressed by the values x and y of the sampled in-phase and quadrature baseband signals as follows: EQU .theta.=tan.sup.-1 (x/y)
The relative phase signal output from the coordinate converter 38 is supplied to the subtractor 41 and the delay element 40. At the delay element 40 the relative phase signal is delayed by one symbol period of the received signal and then is supplied to the subtractor 41. The subtractor 41 subtracts, in modulo 2.pi., the output of the delay element 40 from the output of the coordinate converter 38, and thereby obtains the phase shift difference signal (abbreviated hereinafter to phase difference signal).
The phase difference signal output from the subtractor 41 represents the phase transition over each symbol period of the received signal. Upon receiving the phase difference signal from the subtractor 41, the decision circuit 42 obtains the demodulated data on the basis of the predetermined correspondence relationship between the phase difference signal and the demodulated data.
The above conventional differential detection demodulator has the following disadvantage. Since the frequency converter and the phase comparator circuits are composed of analog parts, integration of circuit parts into ICs is difficult. Thus, the adjustment or tuning of the circuits is indispensable. Further, it is difficult to reduce the size and the power consumption of the circuit.